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[ROCm][Bugfix] Add +256 col guard to preshuffle logits buffer (DSv3.2)#41856

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frida-andersson:rocm/dsv32-preshuffle-logits-padding
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[ROCm][Bugfix] Add +256 col guard to preshuffle logits buffer (DSv3.2)#41856
frida-andersson wants to merge 1 commit intovllm-project:mainfrom
frida-andersson:rocm/dsv32-preshuffle-logits-padding

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@frida-andersson frida-andersson commented May 6, 2026

Summary

The AITER gluon preshuffle kernel (_gluon_deepgemm_fp8_paged_mqa_logits_preshuffle) performs unmasked buffer_store writes up to ~190 float32 elements past context_length in each logits row when block_size=64. With the previous exact-size allocation those stores corrupt the logits of the adjacent row, causing wrong top-k selection and degenerate output.

Solution

Introduce _get_paged_logits_buffer which allocates (rows, cols + _PAGED_LOGITS_COL_PADDING) where _PAGED_LOGITS_COL_PADDING=256. The returned tensor is contiguous with stride(0)=cols+256, stride(1)=1. The only consumer, top_k_per_row_decode, already takes logits.stride(0) and logits.stride(1) as explicit arguments and bounds iteration by seq_lens, so the wider row stride is fully transparent.

A fresh allocation is used on every call (rather than caching) so that each HIP graph bucket retains its own stable tensor pointer; caching a shared global that gets reallocated for a larger batch bucket would leave earlier-captured graphs with dangling pointers on replay.

Also fixes device="cuda"q_fp8.device so TP ranks > 0 allocate on the correct GPU.

Test plan

  • GSM8K 5-shot flexible-extract: 0.9416 on TP4 with HIP graphs and --block-size 64 (reference fork: 0.9409)
  • Existing behaviour with block_size=1 is unchanged (takes the _stage1 path, _get_paged_logits_buffer is never called)

Related

Co-authored-by: Markus Hartikainen maeehart@users.noreply.github.com

The AITER gluon preshuffle kernel (_gluon_deepgemm_fp8_paged_mqa_logits_
preshuffle) performs unmasked buffer_store writes up to ~190 float32
elements past context_length in each logits row when block_size=64.
With the previous exact-size allocation those stores corrupt the logits
of the adjacent row, causing wrong top-k selection and degenerate output.

Fix: introduce _get_paged_logits_buffer that allocates (rows,
cols + _PAGED_LOGITS_COL_PADDING) where _PAGED_LOGITS_COL_PADDING=256.
A non-contiguous [:rows, :cols] slice is intentionally avoided:
deepgemm_fp8_paged_mqa_logits assumes contiguous output and would compute
incorrect row offsets from a non-contiguous tensor. The full contiguous
allocation ensures stride(0) = cols + 256 consistently; the padding
columns absorb the OOB writes. top_k_per_row_decode takes logits.stride(0)
and logits.stride(1) as explicit arguments and bounds iteration by
seq_lens, so the extra columns are never read.

A fresh allocation per call (no global cache) ensures each HIP graph
bucket owns its own stable tensor pointer; a shared global reallocated
for a larger bucket would leave earlier-captured graphs with dangling
pointers on replay.

Also fixes device="cuda" -> q_fp8.device so TP ranks > 0 allocate on
the correct GPU.

Validated: GSM8K 5-shot flexible-extract 0.9416 on TP4 with HIP graphs
and block_size=64 (reference fork: 0.9409).

Related: vllm-project#40643 (maeehart: same padding with caching, draft pending MAF
investigation at num_speculative_tokens=2).

Co-authored-by: Markus Hartikainen <mahartik@amd.com>
Signed-off-by: Frida Andersson <fanderss@amd.com>
@frida-andersson frida-andersson requested a review from tjtanaa as a code owner May 6, 2026 18:52
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@mergify mergify Bot added rocm Related to AMD ROCm v1 bug Something isn't working labels May 6, 2026
@github-project-automation github-project-automation Bot moved this to Todo in AMD May 6, 2026
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mergify Bot commented May 6, 2026

Hi @frida-andersson, the pre-commit checks have failed. Please run:

uv pip install pre-commit>=4.5.1
pre-commit install
pre-commit run --all-files

Then, commit the changes and push to your branch.

For future commits, pre-commit will run automatically on changed files before each commit.

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Code Review

This pull request introduces the _get_paged_logits_buffer function to handle logits buffer allocation for ROCm AITER MLA sparse operations. This change adds a 256-column padding to protect against out-of-bounds writes from the AITER preshuffle kernel and ensures the returned tensor is contiguous to avoid row offset corruption. It also updates the device assignment to use the input tensor's device. I have no feedback to provide.

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